Developed an electronics package for underwater rebreather. Responsibilities included system electronics architecture, board design on all system boards, board bringup, firmware architecture and gas control  firmware implementation.

Provided VGA expertise to design team designing new VGA core for client’s graphics accelerators.

Developed an FPGA based system on chip implementation for military applications. Responsibilities included system electronics architecture, board design on all system boards, FPGA synthesis, and board bringup.

Architected and implemented a 2D graphics and video accelerator for palmtop to light laptop use. Responsibilities included system architecture and system design in Verilog.

Architected and implemented a high reliability 10GigE Fabric Link for an MPLS switch. Responsibilities included Verilog design and synthesis.

Developed a high performance 32 bit VGA module in synthesizable Verilog designed to provide VGA compatibility for 3D systems. Responsibilities included design, compatibility testing and synthesis. Eventually resold implementation to 6 companies with a variety of simulation, synthesis and verification requirements.

Architected and assisted in design of a hardware add-on processor to accelerate OpenGL and DirectX 7 transform and lighting.

Architected and assisted in design of a medium performance 3D accelerator chip using embedded DRAM technology.

CDRAM evangelist. Promoted and assisted adoption of Mitsubishi’s CDRAM technology for use in graphics systems.

Participated in the simulation, testing and development of a high performance graphics accelerator for the DEC Alpha architecture.

Architected and developed a Verilog based multiprocess hardware simulation environment for hardware verification.

Lead hardware architect for advanced scalable PC graphics accelerator. Responsibilities included research and development of hardware acceleration of advanced graphics features.